1. Field of the Invention
This invention provides a block specific harmonic balance simulator for use with electronic design automation (“EDA”) tools used in radio frequency circuit designs. Specifically, this invention relates to the simplification of frequency-domain analysis in the design of radio frequency circuit designs by using harmonic balance method thus reducing the number of frequencies used during in an electrical system simulation.
2. Related Art
As the complexity, efficiency and robustness requirements in electrical devices such as mobile phones, satellite receivers and wireless local area networks increase, more efficient and accurate circuit design of such devices are required. To reduce product development schedules and make the design work as efficient as possible, it is important to automate the design of the circuitry. This design work is often performed by simulation computers and associated software where the circuitry design is stored into the memory of a computer as a virtual representation.
Circuit design typically involves several steps. Usually the design starts with some schematic representation of the circuit that can then be simulated by circuit designers to observe and manipulate the behavior of the design in order to increase robustness of the design and optimize its performance. When the design on a schematic level works, a layout of the circuit may be produced.
Present methodologies in circuit design analysis that are in use in circuit simulation software analyze the behavior of electric circuitry either in the frequency domain or in the time domain. The designer considers the circuit as a whole and applies the same algorithm throughout the computer representation of the electric circuit under evaluation. This methodology may present particular problems with the frequency domain nonlinear steady-state method, harmonic balance that is almost invariably used in the electrical engineering community to simulate the behavior of the electronic circuits designed in the frequency domain. To one skilled in the art of electronic circuit design, the engineering process of designing an electronic circuitry will need to consider overall systems comprising smaller subsystems where each may have very different modes of operation. These subsystems may have states or modes of operation that are not shared by the other subsystems.
In prior art systems, the circuit designer inputs data instructions to the system or circuit simulator computer system. The design process followed by circuit designers is typically a structured process where any outcome of the process is derived from analysis of subsystems or sub-circuits that are to an extent designed separately. The completion of the design process typically requires verification of correctness of operation of the overall system completed by joining the subsystems together. If such a verification or additional design is accomplished by a circuit simulator, the knowledge from the previous steps of the design process can be used to represent the computational representation of the entire system. However, this is not accomplished to full extent by prior art simulators. Most importantly, present day harmonic balance simulators and other steady state circuit simulators and their derivatives do not allow the circuit designer to specify that some modes of operation are not present or are unimportant for the physical behavior of each sub-circuit. Therefore, such knowledge would be potentially useful for the whole system simulation that is currently unavailable in prior art systems creating serious shortcomings in prior art circuit simulators.
Also in prior art systems, the harmonic balance methodology for steady state simulation, or derivatives and enhancements of such steady state methods, the analysis methodology uses the same parameters applied to each and every subsystem. In many present day engineering problems such as those in the field of radio frequency integrated circuit design, some subsystems may include a large number of operational modes that are needed to be included in a computer representation of that particular subsystem, but are not shared by other subsystems. If the modes of operation are still unnecessarily included in the computer representation of the other subsystems, a serious inefficiency will arise and the time required for the analysis process and use of computer memory will be prohibitively large for the simulation analysis to be practical to a circuit designer.